Editra 64 bit5/3/2023 The lowest bit in the address will serve as a tag for type: One famous user of this is the V8 engine with SMI (small integer) optimization. Clear the 2 tag bits before using the pointer int *p1 = &val // the pointer we want to store the value into Again you also need to clear those bits before dereferencing. For 64-bit values you can use the 3 low bits because they're already 8-byte aligned. If int is 4-byte aligned then the 2 low bits are always 0 and you can use them like in 32-bit architectures. You can also use the lower bits to store data. Because most modern 64-bit OSes split kernel and user space in half, so bit 47 is always zero and you have 17 top bits free for use In reality you can usually use the 48 th bit, too. Previously Linux also uses the 63 rd bit of the GS base address to indicate whether the value was written by the kernel If the value is NaN, the low 48-bits will store the pointer to the object with the high 16 bits serve as tag bits, otherwise it's a double value. WebKit's JavaScriptCore and Mozilla's SpiderMonkey engine as well as LuaJIT use this in the nan-boxing technique. standard-compliant way to sign-extend the value Note: Technically this is implementation defined. Sign extend first to make the pointer canonical Note that casting the pointer value to long is not the correct way to do because long is not guaranteed to be wide enough to store pointers. That said, in x86_64 you're still free to use the high 16 bits if needed (if the virtual address is not wider than 48 bits, see below), but you have to check and fix the pointer value by sign-extending it before dereferencing. Some other 64-bit architectures like ARM64 have the option to ignore the high bits, therefore you can store data in pointers much more easily. You need to make sure that the address is canonical before using the pointer. Addresses complying with this rule are referred to as "canonical form."Īs the CPU will check the high bits even if they're unused, they're not really "irrelevant". Further, bits 48 through 63 of any virtual address must be copies of bit 47 (in a manner akin to sign extension), or the processor will raise an exception. in the first implementations of the architecture, only the least significant 48 bits of a virtual address would actually be used in address translation (page table lookup). More importantly, according to the same article : This is compared to just 4 GB (2 32 bytes) for the x86. The AMD64 architecture defines a 64-bit virtual address format, of which the low-order 48 bits are used in current implementations (.) The architecture definition allows this limit to be raised in future implementations to the full 64 bits, extending the virtual address space to 16 EB (2 64 bytes). The high order bits are reserved in case the address bus would be increased in the future, so you can't use it simply like that
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